Dossier · Strategic · 1987 – Present
The Silicon Lattice
A planetary-scale industrial network where a handful of nodes — fabs, lithography monopolies, design houses, and trade lanes — quietly dictate the velocity of every modern economy. Concentration is the feature; concentration is the risk.
Global TAM
$627B
+18%
Advanced Node Concentration
92%
Taiwan
EUV Machines / yr
~55
Single vendor
Strategic Risk Index
8.4 / 10
High
01
Key Factions & Entities
The actors that shape the system.
PWR 95
TSMC
Foundry Hegemon
Manufactures ~90% of advanced logic chips. Single point of planetary dependence.
PWR 88
ASML
Lithography Monopoly
Sole supplier of EUV machines. No EUV → no advanced nodes.
PWR 92
NVIDIA
Compute Architect
Designs the GPUs powering the global AI buildout.
PWR 85
United States
Strategic Designer
Controls EDA tools, IP, and export-control regime.
PWR 78
China
Demand & Challenger
Largest consumer, racing toward sovereign fabs.
PWR 72
South Korea
Memory Powerhouse
Samsung and SK Hynix dominate global memory output.
PWR 65
Japan
Materials Backbone
Photoresists, silicon wafers, specialty chemicals.
PWR 60
Netherlands
EUV Origin
Hosts ASML; geopolitical leverage point.
02
Strategic Overview
Vectors of leverage and fragility.
92%
Concentration Risk
Of advanced logic capacity sits in a single jurisdiction. Single-point failure for the global economy.
1 vendor
Lithography Choke
ASML is the only commercial supplier of EUV. No EUV → no leading-edge silicon.
+340%
Compute Demand
AI-driven wafer demand has rewritten capacity allocation. The race is structural, not cyclical.
03
Timeline Preview
Pivotal moments.
1987
TSMC founded in Hsinchu
1995
ASML spins out of Philips
2007
iPhone catalyzes mobile silicon
2017
EUV reaches commercial production
2020
COVID exposes fragility
2022
CHIPS Act + export controls
2024
AI compute supercycle